The present invention pertains to the field of receivers. More particularly, the present invention pertains to reference voltage generation for a receiver.
Components coupled to data lines of a bus typically communicate using a digital signal that varies between a high logic level and a low logic level. The high and low logic levels are typically represented by a high voltage and a low voltage on a data line, respectively. To communicate between two chips, the driver in a first chip will drive a signal that varies between the high and low voltages onto a data line of a bus. A receiver in a second chip (receiver chip) receives the signal and recognizes the logic level by comparing the voltage level of the signal to a reference voltage. After the receiver recognizes the logic level, the logic level is stored in a latch and made available to other elements in the receiver chip. For proper operation, the signal should have reached a stable level relatively close to the high or low voltage before the receiver captures the logic level (logic state) and stores it.
Unfortunately, the signal at the receiver does not change cleanly from a low voltage to a high voltage (or a high voltage to a low voltage) because of noise and ringback making it necessary to wait for a period of time before the signal has reached a relatively stable level. Due to noise and ringback, there is a period of time during which it is relatively uncertain (period of uncertainty) whether the signal is above or below the reference voltage. This period of uncertainty affects the frequency with which the driver can switch between the low and high voltages. Increasing periods of uncertainty typically require lower frequencies for proper operation. Lower frequencies result in relatively poor data throughput which is undesirable in meeting the increasing demand for high data throughput in today""s high performance systems.
There are two techniques for decreasing the period of uncertainty, thereby allowing higher frequency signals to be used on the bus and improving performance. The first technique involves the receiver chip generating two reference voltages instead of just one reference voltage. The receiver selects the appropriate reference voltage based on the previous state of the signal at the receiver. For example, if the previous state of the signal is a low logic level represented by a low voltage, the receiver selects the low voltage reference, maximizing the ringback margin for the arriving signal. The ringback margin is maximized because the arriving signal will likely stay above the low voltage reference even when significant ringback occurs. If the previous state of the signal is a high logic level represented by a high voltage, the receiver selects the high voltage reference, also maximizing the ringback margin for the arriving signal.
Unfortunately, generating the two reference voltages at the receiver chip does not provide information about the noise effects that are occurring at the driver power planes or on the data line. Consequently, these noise effects cannot be accounted for at the receiver, making it difficult to operate the driver at a relatively high frequency.
The second technique for decreasing the period of uncertainty involves coupling the noise from the power planes of the driver to a single reference voltage generated at the driver. Generating the reference voltage at the driver and coupling the noise of the power planes to the driver is beneficial because it allows the noise effects at the driver to be accounted for and relayed to the receiver, decreasing the period of uncertainty for some cases of noise in the power planes. There are four cases in which noise can occur in the power supply plane (Vcc plane) and the ground plane (Vss plane): in both the power supply plane and the ground plane, in neither plane, or in just one plane or the other but not both planes. Unfortunately by coupling the noise from both planes to a single reference voltage, the period of uncertainty for some cases is decreased while for other cases it may actually increase. Since the frequency of the driver depends upon the worst case period of uncertainty, the driver frequency will be relatively low, resulting in relatively poor performance.
Since generating the reference voltages at the receiver typically requires the driver to operate at a relatively low frequency because the noise effects at the driver are not accounted for, it would be advantageous to generate the reference voltages in a manner that allows accounting for the noise effects at the driver. Additionally, since generating a single reference voltage that includes the effect of noise in both the Vcc and Vss planes requires the driver to operate at a relatively low frequency, it would be advantageous to account for the effect of noise in both the Vcc and Vss planes in a manner that would allow the driver to operate at a relatively higher frequency.
According to one embodiment of the invention a circuit including a power supply plane, a ground plane, and a signal source that generates reference voltages for detection by a receiver is described. The signal source includes a driver adapted to generate a first signal to the receiver, the first signal having a present and a previous voltage levels. The signal source also includes a low reference voltage generator and a high reference voltage generator, each producing a low reference voltage signal and a high reference voltage signal, respectively, from a low reference output and a high reference output, respectively. The high reference output and the low reference output are coupled to the ground plane and the power supply plane, respectively. The high reference voltage generator and the low reference generator are capable of communicating the high reference voltage signal and the low reference voltage signal to the receiver.